Physics Electronics PMDC Conceptual Practice
PMDC Verified Question 231 of 494
How does applying a forward bias voltage \( V_F \) across a PN junction diode affect the width \( W \) of its depletion layer?
A
The width increases linearly
B
The width remains constant
C
The width expands to the physical edges of the chip
D
The width decreases according to \( W \propto \sqrt{V_0 - V_F} \)
Tap any option to test your recall and reveal the step-by-step Propolis autopsy.

Propolis Cognitive Error Autopsy

Official Correct Choice:
Option D: The width decreases according to \( W \propto \sqrt{V_0 - V_F} \)
Concept:

Forward bias applies an external electric field that opposes the built-in potential barrier, reducing the net junction potential to \( V_0 - V_F \) and narrowing the depletion layer.

Formula:

$$W = \sqrt{\frac{2 \epsilon_s (V_0 - V_F)}{q} \left( \frac{1}{N_A} + \frac{1}{N_D} \right)} \propto \sqrt{V_0 - V_F}$$

Solution:

  • The forward voltage \( V_F \) counteracts the built-in potential \( V_0 \).


  • As \( V_F \) approaches \( V_0 \), the net potential barrier decreases, reducing the width \( W \) of the depletion layer and allowing majority carriers to cross the junction.


Why other options are incorrect:

  • Option A: Depletion width decreases under forward bias; it increases under reverse bias.
  • Option B: The depletion width changes with applied bias voltage.
  • Option C: Depletion layer expansion occurs under high reverse bias, not forward bias.

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